pmic was designed under 1uh condition for the best ripple and transient response. if the degradations in ripple and transient response are acceptable, 0.47uh can be an option.
3.3v as the pull up source is acceptable even if dvdd is 1.8v. but nvcc_i2c of the i²c domain in soc should be 3.3v (the same voltage as the pull up source for pmic) and dvdd in pmic always needs to be 1.8v.
as the secure i²c access function, pmic prepares the reglock register which prohibits the unexpected i²c access during the operation. i²c access is locked by the register as the default setting.
the output voltage for buck8 can be adjusted by u-boot in the initial startup depending on the memory type in use. the voltage change handled by u-boot is acceptable for pmic because the validity in the power sequence is confirmed by nxp and no other sideband effects are found during their validation.
buck6 is initially on as the default setting and its output voltage is monitored during the power sequence as an one of the triggers to de-assert por_b, the power good signal to soc. so it is not recommended to turn off buck6.
buck6 supports 100% max duty but there is the limitation for input range described as "headroom" in the datasheet. please refer to the section in the datasheet for details.